From 40daf685ffce0af33506b139bf487d35461d2458 Mon Sep 17 00:00:00 2001
From: raphy <raphy@dekedin.me>
Date: Mon, 12 Jun 2023 16:23:30 +0200
Subject: [PATCH] updated documentation, a bit

---
 spec.md | 39 ++++++++++++++++++++-------------------
 1 file changed, 20 insertions(+), 19 deletions(-)

diff --git a/spec.md b/spec.md
index 7471821..ff2931f 100644
--- a/spec.md
+++ b/spec.md
@@ -11,7 +11,7 @@ Since I'm studying riscV, this will be a lot riscv inspired.
 The gravejit virtual machine sports 16 16-bit registers (plus the program counter!) and 16 operations.
 
 Here is the list of registers togheter with memonics.
-
+```
 0 : zero // register 0 is always 0.
 1 : ra   // return address
 2 : sp   // stack pointer
@@ -30,27 +30,28 @@ Here is the list of registers togheter with memonics.
 15: t4 // don't know what to do with this
 
 pc: program counter.
+```
 
 ## ISA
 
-opcode |  memonic | format  | description
-
-0000 | NOP           | just 0s'| Does nothing.
-0001 | ADD s0 s1 s2  | R       | s0 = s1 + s2 
-0010 | SUB s0 s1 s2  | R       | s0 = s1 - s2
-0011 | AND s0 s1 s2  | R       | s0 = s1 && s2
-0100 | XOR s0 s1 s2  | R       | s0 = s1 xor s2
-0101 | SLL s0 s1 s2  | R       | s0 = s1 << s2
-0110 | SLI s0 c      | I       | s0 = s0 << c 
-0111 | ADDI s0 c     | I       | s0 = s0 + c
-1000 | BEQ s0 s1 s2  | R       | if (s1 == s2) -> pc = s0 
-1001 | BGT s0 s1 s2  | R       | if (s1 > s2) -> pc = s0
-1010 | JAL s0 s1 c   | J       | s0 = pc+1; pc += s1 + c;
-1011 |
-1100 | LOAD s0 s1 s2 | R       | loads s1 + shift by s2 in s0
-1101 | STORE s0 s1 s2| R       | stores s0 in address s1 + shift by s2
-1110 | CALL s0 c     | I       | performs system call
-1111 | HALT          | just 1s'| halt, and possibly catch fire.
+| opcode |  memonic       | format  | description                             |
+| ------ | -------------- | ------- | --------------------------------------- |
+| 0000   | NOP            | just 0s'| Does nothing.                           |
+| 0001   | ADD s0 s1 s2   | R       | s0 = s1 + s2                            |
+| 0010   | SUB s0 s1 s2   | R       | s0 = s1 - s2                            |
+| 0011   | AND s0 s1 s2   | R       | s0 = s1 && s2                           |
+| 0100   | XOR s0 s1 s2   | R       | s0 = s1 xor s2                          |
+| 0101   | SLL s0 s1 s2   | R       | s0 = s1 << s2                           |
+| 0110   | SLI s0 c       | I       | s0 = s0 << c                            |
+| 0111   | ADDI s0 c      | I       | s0 = s0 + c                             |
+| 1000   | BEQ s0 s1 s2   | R       | if (s1 == s2) -> pc = s0                |
+| 1001   | BGT s0 s1 s2   | R       | if (s1 > s2) -> pc = s0                 |
+| 1010   | JAL s0 s1 c    | J       | s0 = pc+1; pc += s1 + c;                |
+| 1011   |                |         | #TODO?                                  |
+| 1100   | LOAD s0 s1 s2  | R       | loads s1 + shift by s2 in s0            |
+| 1101   | STORE s0 s1 s2 | R       | stores s0 in address s1 + shift by s2   |
+| 1110   | CALL s0 c      | I       | performs system call                    |
+| 1111   | HALT           | just 1s'| halt, and possibly catch fire.          |
 
 
 ### Operation formats: