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fixed typos

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raphy 2023-11-12 07:00:44 +01:00
parent f64747dc93
commit 724cc66faa
1 changed files with 2 additions and 2 deletions
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spec.md
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@ -10,7 +10,7 @@ Since I'm studying riscV, this will be a lot riscv inspired.
The gravejit virtual machine sports 16 16-bit registers (plus the program counter!) and 16 operations.
Here is the list of registers togheter with memonics.
Here is the list of registers together with memonics.
```
0 : zero // register 0 is always 0.
1 : ra // return address
@ -56,7 +56,7 @@ pc: program counter.
### Operation formats:
Each istruction is 16 bits long.
Each instruction is 16 bits long.
The first 4 most-significant bits are the opcode.
Constants (c in the above table) are always considered signed, and written in
two's compliment. Sign extension also takes place whenever needed.